研发 岗位类型
上海 工作地点
Looking for a talented and highly self-motivated candidate that has strong background and hands-on experience in the physical design for advanced technology nodes. The candidate will work on the physical implementation of our state-of-art SoC products. Driving all aspects from RTL to GDS including timing and physical trade-offs, die size reduction and delivery of final product on schedule while meeting design goals.
Responsibilities:
1.Perform physical implementation of the ASIC design from netlist to GDS, including floorplanning, power grid and clock network implementation, place and route, timing closure and physical verification.
2.Work with multiple teams on the SoC architecture study and timing/power/area design target.
3.Working with different IP owners to ensure seamless IP integration at full chip level.
4.Writing scripts for design automation flow and productivity enhancement.
工作职责:
1.负责芯片从网表到GDS的后端物理实现,包括布局规划,时钟树生成(CTS), 布局布线,时序优化和收敛,以及GDS的物理验证。
2.和多个设计团队合作制定芯片结构,参与制定芯片性能/面积/功耗等方面的设计目标。
3.与不同功能模块的设计团队合作保证功能模块的顺利集成。
4.优化后端设计自动化的流程和提高团队设计开发效率。
Job Requirement:
1,Experience in ASIC Physical Design from netlist to GDSII.
2.Experience in using EDA tools such as Synopsys ICC or Cadence SOC Encounter.
3.Hands on experience in Floor planning, CTS, STA.
4.Experience in Power grid, clock tree, and low-power flow implementation methods.
5.Hands on experience with STA using Primetime, power analysis.
6.Hands on experience with IR drop analysis, formal verification and physical verification.
7.Timing closure, ECO process using PrimeTime.
8.Programming and scripting skills (Tcl, perl ,shell).
9.DFT/DFM knowledge is a plus.
10.Self-motivated and able to work effectively in a start-up environment.
11.Ability to execute to stringent schedule & die size requirements and effective communication skills.
任职要求
1.后端工作经验,微电子或者相关学科本科以上学历,欢迎本科的小伙伴。
2.良好的沟通能力和团队精神,能够在精干的团队环境里高效率的发挥自己的能力。
3.熟练使用主流P&R流程工具(Synopsys、Cadence的相关P&R工具)。
4.具有从netlist到GDS整个流程的实际经验,包括布局规划,power gird,时钟树生成(CTS),布局布线设计,时序收敛,IR-drop,lvs/drc。
5.具备扎实的时序分析知识与signoff的技能。
6.具备DFT/DFM相关经验的优先。
7.熟练的脚本编写技能(Tcl,perl, shell)。
为存储领域中的不同类型、不同阶段用户提供优质可靠的存储主控芯片、固态硬盘和存储系统等解决方案
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